Analogue CMOS techniques for VLSI neural networks: process invariant circuits and devices

VLSI neural networks are based on a two-dimensional array of synapses. A synapse is a 2 quadrant multiplier. It multiplies the incoming neural state, V_j, by its synaptic weight, T_ij. A column of synapses feeds into a neuron which sums all of their multiplication results. From the VLSI viewpoint, there are two approaches the first of which is to use digital multipliers which require a large silicon area. The other alternative is to use analogue multipliers. Their compactness allows thousand of analogue multipliers to be implemented on a single chip. However, analogue circuits are much more sensitive to the problems of process variations than their digital counterparts. In the Pulse Stream circuits developed at Edinburgh University, the neural state is represented by a stream of pulses. This pulse stream is used to switch a current, proportional to the synaptic weight, on and off. Thus the charge being transferred is proportional to the duty cycle of the pulse stream times the value of the current, so achieving the desired multiplication. The main advantage of this technique is that it simplifies the implementation of the analogue multiplier. As a bonus, since one of the signals now has digital levels, it is more robust and relatively immune to the effects of noise. The neuron is composed of several sub-cells, an op-amps, a voltage integrator and a voltage controlled oscillator (VCO)