DocumentCode :
278347
Title :
Deterministic pattern testability analysis
Author :
Bell, I.M.
Author_Institution :
Dept. of Electron. Eng., Hull Univ., UK
fYear :
1991
fDate :
33374
Firstpage :
42675
Lastpage :
42680
Abstract :
Existing testability measures suffer from a number of deficiencies, particularly when they are used in conjunction with deterministic test pattern generators. The values obtained may not be suitable for use as guidance heuristics, design hierarchy is often ignored, and results with sequential circuits are often poor. Little is known of the relative quality of test measures when used with deterministic generators as studies have concentrated on random patterns. This paper discusses the deficiencies of existing testability measures with reference to deterministic pattern generation and sequential circuits and suggests some approaches, currently being investigated at the University of Hull, which may provide better results
Keywords :
VLSI; automatic test equipment; digital integrated circuits; integrated circuit testing; logic design; logic testing; sequential circuits; deficiencies of existing testability measures; deterministic pattern generation; deterministic pattern testability analysis; deterministic test pattern generators; quality of test measures; sequential circuits;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Design for Testability, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
181582
Link To Document :
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