A tag coprocessor for RISC architectures

Presents a novel architecture for the efficient execution of symbolic languages on conventional von Neumann, register-based machines. Unlike other symbolic processing architectures, this is based on a Tag Coprocessor (TC) which is designed to work in parallel with a conventional RISC CPU such as the MIPS R3000. The TC performs almost all the tag manipulation operations independently of the CPU. It can also perform stack height checking, range checking and loop control. Our design significantly enhances the execution speed of symbolic languages such as Lisp and Prolog on a RISC processor, yet all existing software for the CPU without the TC will work with minimal modification. The simplicity of the TC architecture provides a cost-effective way of designing systems specifically for artificial intelligence applications