• DocumentCode
    2789395
  • Title

    Applying simulated evolution to scheduling in high level synthesis

  • Author

    Ly, Tai A. ; Mowchenko, Jack T.

  • Author_Institution
    Dept. of Electr. Eng., Alberta Univ., Edmonton, Alta., Canada
  • fYear
    1990
  • fDate
    12-14 Aug 1990
  • Firstpage
    172
  • Abstract
    Most scheduling algorithms in high level synthesis are greedy in nature and hence are vulnerable to local minimums in the design space. A novel scheduling algorithm is presented based on simulated evolution which incorporates probabilistic uphill moves to escape from local minimums. This algorithm uses local heuristics and simple cost functions, and relies on rapid iterations and effective design space exploration to obtain superior designs
  • Keywords
    circuit layout CAD; logic CAD; scheduling; cost functions; design space exploration; high level synthesis; local heuristics; probabilistic uphill moves; rapid iterations; scheduling algorithm; simulated evolution; Algorithm design and analysis; Hardware; Heuristic algorithms; High level synthesis; Integrated circuit interconnections; Lifting equipment; Scheduling algorithm; Space exploration; Strain control; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
  • Conference_Location
    Calgary, Alta.
  • Print_ISBN
    0-7803-0081-5
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1990.140679
  • Filename
    140679