Title :
Highly reliable Au-Sn bonding with background GaAs LSI chips
Author :
Nishiguchi, Masanori ; Goto, Noboru ; Mishizawa, H.
Author_Institution :
Sumitomo Electr. Ind. Ltd., Yokohama, Japan
Abstract :
GaAs LSI chips (5.40mm×5.18 mm) with ground back-surfaces ( Rmax=0.1-1.0 μm) have been successfully bonded on alumina substrates using Au-Sn (80-20 wt.%) eutectic alloy with well-controlled scrubbing action. The authors investigated the reliability of mechanically ground chips through die-shear and thermal shock tests. No chip fracture occurred and no induced void was observed with scanning acoustic microscopy. The shear strength of the chips after thermal shocks remained at more than 10 kg, clearly passing the MIL-STD-883C test. Surface flaws due to back-grinding, which would cause chip fracture, were completely eliminated by slight chemical etching after back-grinding. Scrubbing action was confirmed to be necessary to obtain void-free bondings consistently in low-cost production. The Sn in the Au-Sn preform easily forms an oxide film at the surface, which tends to prevent wetting at the bonding interface. This tin oxide film (300-400 Å) was observed through Auger electron spectroscopy to be broken down by scrubbing action
Keywords :
III-V semiconductors; circuit reliability; gallium arsenide; large scale integration; lead bonding; packaging; thermal shock; Al2O3; Auger electron spectroscopy; GaAs; MIL-STD-883C test; chemical etching; die-shear tests; ground back-surfaces; mechanically ground chips; reliability; scrubbing action; thermal shock; void-free bondings; wetting; Acoustic testing; Bonding; Chemicals; Electric shock; Gallium arsenide; Large scale integration; Microscopy; Substrates; Surface cracks; Tin;
Conference_Titel :
Electronic Manufacturing Technology Symposium, 1990 Proceedings, Competitive Manufacturing for the Next Decade. IEMT Symposium, Ninth IEEE/CHMT International
Conference_Location :
Washington, DC
DOI :
10.1109/IEMT9.1990.115009