DocumentCode :
2794935
Title :
A CABAC Encoder Design of H.264/AVC with RDO Support
Author :
Tian, X.H. ; Le, Thinh M. ; Ho, B.L. ; Lian, Y.
Author_Institution :
Nat. Univ. of Singapore, Singapore
fYear :
2007
fDate :
28-30 May 2007
Firstpage :
167
Lastpage :
173
Abstract :
In this paper, a HW CABAC encoder architecture is proposed targeting H.264/A VC main profile. CABAC and rate distortion optimization (RDO) are two important coding tools that enhance coding efficiency of H.264/AVC How ever, coding speed of CABAC encoder is limited by the coding data dependence and its serial coding procedure, and RDO requires large memory resource and costs long delay of memory access to backup and restore CABAC context state data. The CABAC encoder of this paper utilizes pipeline structure at top level to reduce data dependence, and coding speed of one symbol per cycle is achieved. A context managing mechanism is designed that fully supports RDO coding of H.264/AVC encoder. It significantly reduces context memory cost and operation delay for context backup and restore. 85% of context memory resource is reduced comparing to the reference design. Synthesis result shows that the encoder can work at 620 MHz targeting 0.13 um CMOS process.
Keywords :
adaptive codes; arithmetic codes; audio coding; binary codes; optimisation; rate distortion theory; video coding; H.264 audio-video coding; context-based adaptive binary arithmetic coding; hardware CABAC encoder architecture; memory resource; pipeline structure; rate distortion optimization; Arithmetic; Automatic voltage control; Bit rate; Clocks; Costs; Delay; Encoding; Pipelines; Rate-distortion; Video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Rapid System Prototyping, 2007. RSP 2007. 18th IEEE/IFIP International Workshop on
Conference_Location :
Porto Alegre
ISSN :
1074-6005
Print_ISBN :
0-7695-2834-1
Type :
conf
DOI :
10.1109/RSP.2007.5
Filename :
4228502
Link To Document :
بازگشت