DocumentCode :
2796262
Title :
ARPA - a technology independent and synthetizable system-on-chip model for real-time applications
Author :
Oliveira, Arnaldo S R ; Sklyarov, Valery A. ; Ferrari, António B.
Author_Institution :
IEETA, Aveiro Univ., Portugal
fYear :
2005
fDate :
30 Aug.-3 Sept. 2005
Firstpage :
484
Lastpage :
491
Abstract :
This paper describes the advanced real-time processor architecture (ARPA) system-on-chip. The goal of this work is to create a technology independent and synthetizable system-on-chip (SoC) model for real-time applications. The main component of the SoC is a MIPS32-based RISC processor. It is implemented using a pipelined simultaneous multithreading structure that supports the execution of more than one thread or task at a time. The synergy between pipelining and simultaneous multithreading allows combining the exploration of Instruction level parallelism and task level parallelism, hide the context switching time and reduce the need of employing complex speculative execution techniques to improve the performance of the pipelined processor. A fundamental component of the ARPA SoC is the operating system coprocessor, which implements in hardware some of the operating systems functions, such as task scheduling, switching, communication and timing. The proposed architecture allows building flexible, high performance, time predictable and power efficient processors optimized for embedded real-time systems.
Keywords :
coprocessors; multi-threading; multiprocessing systems; pipeline processing; real-time systems; reduced instruction set computing; system-on-chip; ARPA system-on-chip; MIPS32-based RISC processor; advanced real-time processor architecture; embedded real-time system; instruction level parallelism; operating system coprocessor; pipelined processor; pipelined simultaneous multithreading; speculative execution technique; switching; task level parallelism; task scheduling; timing; Communication switching; Context; Coprocessors; Multithreading; Operating systems; Pipeline processing; Real time systems; Reduced instruction set computing; System-on-a-chip; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design, 2005. Proceedings. 8th Euromicro Conference on
Print_ISBN :
0-7695-2433-8
Type :
conf
DOI :
10.1109/DSD.2005.19
Filename :
1559843
Link To Document :
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