DocumentCode
2798458
Title
A New Design for 7:2 Compressors
Author
Rouholamini, Mahnoush ; Kavehie, Omid ; Mirbaha, Amir-Pasha ; Jasbi, Somaye Jafarali ; Navi, Keivan
Author_Institution
Sci. & Res. Center of Hesarak, Tehran
fYear
2007
fDate
13-16 May 2007
Firstpage
474
Lastpage
478
Abstract
High order compressors play a specific role in realizing high speed multipliers. By increasing the demand for fast multiplication process, high order compressors have attracted many researchers to this field. In this paper a new implementation for 7:2 compressors, based on the conventional architecture, is proposed. According to the results, the design presented achieves a remarkable improvement in terms of speed (especially in low voltages) and power consumption over the best counterpart. This accomplishment is the direct result of shortening the critical delay path in the proposed circuit design. As the simulation results demonstrate, the structure presented here has improved the power consumption from minimum 0.07% (at supply voltage = 3.5 volt) through maximum 11% (at 1.2 volt), and the speed of the circuit from minimum 19% (at 3.5 volt) through maximum 23% (at 1.2 volt). HSPICE is the circuit simulator used, and the technology being used for simulations is 0.25 mum technology.
Keywords
SPICE; digital simulation; logic CAD; multiplying circuits; 7:2 compressors design; HSPICE; circuit design; circuit simulator; critical delay path; high order compressors; high speed multipliers; size 0.25 mum; voltage 1.2 V; voltage 3.5 V; Adders; Circuit simulation; Compressors; Counting circuits; Delay; Design engineering; Digital signal processing; Energy consumption; Low voltage; Microprocessors;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Systems and Applications, 2007. AICCSA '07. IEEE/ACS International Conference on
Conference_Location
Amman
Print_ISBN
1-4244-1030-4
Electronic_ISBN
1-4244-1031-2
Type
conf
DOI
10.1109/AICCSA.2007.370924
Filename
4230999
Link To Document