Integrated digital adaptive antennas

The authors consider the philosophy behind the design of high performance digital adaptive antenna processors for future communications and radar applications. The advent of digital radio technology will mean that digital beamforming techniques will become more universal, particularly for communication applications. In such systems, the concept of an integrated adaptive antenna will become a reality since the adaptive processor will simply be an extension of the digital signal processing performed by the digital receiver design. The authors present a design concept which uniquely exploits systolic array technology and complex VLSI circuitry to provide a highly integrated adaptive beamformer architecture capable of extremely rapid adaptation in real-time. A prototype unit is presently being developed at STC using a VLSI node chip processor which has been designed as part of the VHPIC application demonstrator programme