Implementation of Adaptive FIR Filter for Pulse Doppler Radar

Digital Signal Processing (DSP) systems involve a wide spectrum of DSP algorithms and their realizations are often accelerated by use of novel VLSI design techniques. Now-a-days various DSP systems are implemented on a variety of programmable signal processors or on application specific VLSI chips. This paper presents the design of Adaptive Finite Impulse Response (FIR) filter for moving target detection in various clutter conditions in Radar Receiver. The design uses pipelined COordinate Rotation DIgital Computer (CORDIC) unit and pipelined multiplier to get high system throughput and reduced latency in each of the pipelined stage. Saving area on silicon substrate is essential to the design of any pipelined CORDIC. The area reduction in proposed design can be achieved through optimization in the number of micro rotations. For better adaptation and performance of Adaptive Filters and to minimize quantization error, the numbers of iterations are also optimized.