• DocumentCode
    2802380
  • Title

    Reconfigurable Architecture for LDPC and Turbo Decoding: A NoC Case Study

  • Author

    Scarpellino, Michelangelo ; Singh, Ashwani ; Boutillon, Emmanuel ; Masera, Guido

  • Author_Institution
    Electron. Dept., VLSI Lab., Turin
  • fYear
    2008
  • fDate
    25-28 Aug. 2008
  • Firstpage
    671
  • Lastpage
    676
  • Keywords
    Convolutional codes; Iterative decoding; Network topology; Network-on-a-chip; Parity check codes; Reconfigurable architectures; System-on-a-chip; Turbo codes; Very large scale integration; WiMAX;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Spread Spectrum Techniques and Applications, 2008. ISSSTA '08. IEEE 10th International Symposium on
  • Conference_Location
    Bologna, Italy
  • Print_ISBN
    978-1-4244-2203-6
  • Type

    conf

  • DOI
    10.1109/ISSSTA.2008.131
  • Filename
    4621490
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2802380