DocumentCode
2807314
Title
Automated Extraction of Structural Information from SystemC-based IP for Validation
Author
Berner, David ; Patel, Hiren D. ; Mathaikutty, Deepak A. ; Shukla, Sandeep K.
Author_Institution
Inst. de Recherche en Informatique et Systemes Aleatoires
fYear
2005
fDate
Nov. 2005
Firstpage
99
Lastpage
104
Abstract
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large percentage of the overall design time. In efforts to alleviate this problem, the authors propose a methodology of using structural reflection to extract structural information from design sources allowing the use of tools such as test bench generators and model viewers to seamlessly employ this extracted information. In this paper the authors present a methodology to automatically extract structural information from already existing SystemC projects and we show how this information can be exploited for system management and validation tasks. The authors illustrate example uses such as visualization, design management tasks, and automated test generation
Keywords
C++ language; automatic test pattern generation; hardware description languages; industrial property; logic CAD; logic testing; SystemC IP; SystemC projects; automated extraction; automated test generation; design validation; management tasks; structural information; structural reflection; system management; test bench generators; Automatic testing; Data mining; Data structures; Libraries; Reflection; Superluminescent diodes; System testing; System-level design; Visualization; XML;
fLanguage
English
Publisher
ieee
Conference_Titel
Microprocessor Test and Verification, 2005. MTV '05. Sixth International Workshop on
Conference_Location
Austin, TX
ISSN
1550-4093
Print_ISBN
0-7695-2627-6
Type
conf
DOI
10.1109/MTV.2005.8
Filename
4022235
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