DocumentCode
2811935
Title
The DARPA Diverse Accessible Heterogeneous Integration (DAHI) program: Convergence of compound semiconductor devices and silicon-enabled architectures
Author
Raman, S. ; Dohrman, Carl L. ; Tsu-Hsi Chang
Author_Institution
U.S. Defense Adv. Res. Projects Agency (DARPA), Arlington, VA, USA
fYear
2012
fDate
21-23 Nov. 2012
Firstpage
1
Lastpage
6
Abstract
The DARPA Diverse Accessible Heterogeneous Integration (DAHI) program is developing transistor-scale heterogeneous integration processes to intimately combine advanced compound semiconductor (CS) devices, as well as other emerging materials and devices, with high-density silicon CMOS technology. This technology is currently enabling RF/mixed signal circuits with revolutionary performance. For example, InP HBT + CMOS technology is being utilized in advanced DACs and ADCs with CMOS-enabled calibration and self-healing techniques for correcting static and dynamic errors in situ. Such CMOS-enabled self-healing techniques are expected to more generally enable improved CS-based circuit performance and yield in the presence of process and environmental variability, as well as aging. DAHI is also expected to enable the integration of high power CS devices with silicon-based linearization techniques to realize highly power efficient transmitters. By enabling this heterogeneous integration capability, DAHI seeks to establish a new paradigm for microsystems designers to utilize a diverse array of materials and device technologies on a common silicon-based platform.
Keywords
CMOS integrated circuits; III-V semiconductors; analogue-digital conversion; digital-analogue conversion; indium compounds; linearisation techniques; mixed analogue-digital integrated circuits; semiconductor device models; silicon; ADC; CMOS-enabled calibration; CMOS-enabled self-healing technique; CS-based circuit performance; DAC; DAHI program; DARPA; HBT; InP; RF/mixed signal circuit; Si; aging; compound semiconductor device; diverse accessible heterogeneous integration; dynamic error; high power CS device; high-density silicon CMOS technology; highly power efficient transmitter; microsystem; silicon-based linearization technique; silicon-enabled architecture; static error; transistor-scale heterogeneous integration process; CMOS integrated circuits; Foundries; Gallium nitride; Indium phosphide; Radio frequency; Silicon; ADC; Compound semiconductor; DACac; FPA; HBT; InP; ROIC; Si CMOS; foundry; heterogeneous integration; linearization; mixed signal circuit; multi-project wafer;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio-Frequency Integration Technology (RFIT), 2012 IEEE International Symposium on
Conference_Location
Singapore
Print_ISBN
978-1-4673-2303-1
Type
conf
DOI
10.1109/RFIT.2012.6401596
Filename
6401596
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