Design and Simulation of PCI Express Transaction Layer

This paper analyzes the architecture and function of PCI Express transaction layer. The author gave the receiver and transmitter flowchart and state transition diagram of transaction layer. The paper designed transaction layer IP core in the system level with top-down design method, wrote the Verilog HDL codes to implement transaction layer, wrote testbench to verify the correctness of the design module for function simulation. The codes were simulated by Synopsys VCS. The simulation results show that the designed IP core meets the required of the protocol of PCI Express¿ base specification revision 2.0. The design validate its correctness and supports the function of PCI express transaction layer.