A 4.4pJ/access 80MHz, 2K word } 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications

Author

Sharma, Vibhu ; Cosemans, Stefan ; Ashouei, Maryam ; Huisken, Jos ; Catthoor, Francky ; Dehaene, Wim

Author_Institution

ESAT-MICAS Lab., K. U. Leuven, Leuven, Belgium

fYear

2010

fDate

14-16 Sept. 2010

Firstpage

358

Lastpage

361

Abstract

A Variability resilient 128kbit 6T SRAM with energy consumption of 4.4pJ/access, operating at 80MHz for wireless sensor applications is developed in 90nm LP CMOS. The techniques developed include novelty in the local architecture with local read/write assist circuitry. VDD/2 pre-charged short local bit-lines with local sense amplifier enables charge re-cycling and gated read buffers eliminates bit-line leakage The multi-sized sense amplifier redundancy used for global sense amplifiers ensures variability resilient low energy consumption read operation.

Keywords

CMOS memory circuits; SRAM chips; amplifiers; write-once storage; LP CMOS; SRAM; frequency 80 MHz; local sense amplifier; low energy consumption read operation; read buffer; read/write assist circuitry; size 90 nm; variability resilient multisized sense amplifier redundancy; wireless sensor node; write masking feature; Computer architecture; Energy consumption; Logic gates; Microprocessors; Random access memory; Redundancy; Wireless sensor networks;

fLanguage

English

Publisher

ieee

Conference_Titel

ESSCIRC, 2010 Proceedings of the

Conference_Location

Seville

ISSN

1930-8833

Print_ISBN

978-1-4244-6662-7

Type

conf

DOI

10.1109/ESSCIRC.2010.5619717

Filename

5619717