Design automation tools for tile-based analogue cells

Mixed analogue-digital ASICs are becoming increasingly important as more silicon vendors provide mixed signal capability in their fabrication processes and design tools. This paper assesses the merits and limitations of the tile-based approach by comparing it to other design methods for designing analogue cells for mixed-signal ASIC. It then explores how design automation tools may be used to overcome some of the drawbacks of the tile-based method. Next the authors describe an Analogue Tile Compiler (ATC) which is currently under development at Imperial College and LSI Logic. Finally they conclude with some suggestions intended to show how such an automated design approach might influence the future of mixed signal ASIC designs