Title :
Hardware architecture for real-time satellite SAR processing
Author :
Arambepola, Bernard
Author_Institution :
Dept. of Electr. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
Abstract :
Two new processor architectures are presented for the real-time processing of satellite synthetic aperture radar data to generate high resolution radar images. The second architecture, which is a simplification of the first one, is shown to lead to an efficient hardware configuration for continuous SAR image generation in real time
Keywords :
computerised signal processing; digital signal processing chips; radar equipment; DSP chips; high resolution radar images; processor architectures; real-time satellite SAR processing; synthetic aperture radar;
Conference_Titel :
Synthetic Aperture Radar, IEE Colloquium on
Conference_Location :
London
