DocumentCode :
2824436
Title :
A 1.8-V 12-bit 250-MS/s 25-mW self-calibrated DAC
Author :
Chi, Jen-Hung ; Chu, Shih-Hsuan ; Tsai, Tsung-Heng
Author_Institution :
Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
fYear :
2010
fDate :
14-16 Sept. 2010
Firstpage :
222
Lastpage :
225
Abstract :
A 12-bit current-steering self-calibrated digital-to-analog converter (DAC) is presented. Mismatches among the current sources are compensated by the calibration scheme, so that the DAC linearity is ensured and the active area is small at the same time. This digital-to-analog data converter was implemented in a 0.18μm CMOS process, and the active area is smaller than 0.8 mm2. After calibration, the measured differential and integral nonlinearity are both within ±0.5 LSB. At 250-MSample/s, the SFDR is better than 71.68 dB when the input signal is 1-MHz. This DAC dissipates 25mW from a 1.8-V supply.
Keywords :
CMOS integrated circuits; digital-analogue conversion; CMOS process; DAC linearity; differential nonlinearity; digital-to-analog converter; frequency 1 MHz; integral nonlinearity; power 25 mW; self-calibrated DAC; size 0.18 micron; voltage 1.8 V; Arrays; CMOS integrated circuits; Calibration; Linearity; Transistors; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ESSCIRC, 2010 Proceedings of the
Conference_Location :
Seville
ISSN :
1930-8833
Print_ISBN :
978-1-4244-6662-7
Type :
conf
DOI :
10.1109/ESSCIRC.2010.5619889
Filename :
5619889
Link To Document :
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