Design and implementation of RSA cryptosystem using multiple DSP chips

Author

Er, M.H. ; Wong, D.J. ; Sethu, A. A L ; Ngeow, K.S.

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore

fYear

1991

fDate

11-14 Jun 1991

Firstpage

49

Abstract

The authors present the design and implementation of an RSA cryptosystem using multiple TMS320E 15 DSP (digital signal processing) chips. The system developed consists of a stand-alone unit containing the DSP hardware and a high-level PC user-interface. The system is flexible and allows for additional DSP chips to be inserted in allocated slots to improve its performance. It also allows for trade-off between speed of encryption and level of security. The system was found to be 70 times faster than the same RSA algorithm implemented using C-language at PC level

Keywords

cryptography; digital signal processing chips; firmware; parallel processing; RSA cryptosystem; TMS320E 15; encryption speed; firmwave development; high-level PC user-interface; multiple DSP chips; parallel processing; security level; stand-alone unit; Communication channels; Communication system security; Design engineering; Digital signal processing; Digital signal processing chips; Erbium; Hardware; Information security; Public key cryptography; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1991., IEEE International Sympoisum on

Print_ISBN

0-7803-0050-5

Type

conf

DOI

10.1109/ISCAS.1991.176270

Filename

176270