A Dynamic-Logic Frequency Divider for 5-GHz WLAN Frequency Synthesizer

A dynamic-logic frequency divider for fully integrated CMOS frequency synthesizer is presented in this paper. The divider based on the dual-modulus prescaler and dynamic logic circuit is designed to reduce the power consumption, transistor-counts, and chip area. The simulation results show the proposed circuit achieved the operating frequency band from 5.15 GHz to 5.825 GHz for wireless local area network applications. Under 1.8 V supply voltage, it consumes only 3.6 mW and occupies a chip area of 0.285 mm².