Title :
On correlating structural tests with functional tests for speed binning
Author :
Zeng, Jing ; Abadir, Magdy
Author_Institution :
Somerset Design Center, Motorola Inc., Austin, TX, USA
Abstract :
The utilization of functional vectors has been an industry standard for speed binning purpose. This practice can be prohibitively expensive as the ICs become faster and more complex. In comparison, structural patterns can target performance related faults in a more systematic manner. To make structural test an effective alternative to functional test for speed binning, structural patterns need to correlate with functional test frequency closely. In this paper, we demonstrate the correlations between the functional test frequency and that of various types of structural patterns on MPC7455, a Motorola processor executing to the PowerPC™ instruction set architecture.
Keywords :
built-in self test; integrated circuit testing; BIST; MPC7455; Motorola processor; PowerPC instruction set architecture; functional test frequency; functional tests; functional vectors; industry standard; integrated circuit; path delay tests; speed binning; structural patterns; structural tests; transition fault tests; Built-in self-test; Circuit testing; Delay; Frequency; Latches; Logic arrays; Logic testing; Pins; System testing; Timing;
Conference_Titel :
Current and Defect Based Testing, 2004. DBT 2004. Proceedings. 2004 IEEE International Workshop on
Print_ISBN :
0-7803-8950-6
DOI :
10.1109/DBT.2004.1408962
