Title :
On n-detection test sets and variable n-detection test sets for transition faults
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
Abstract :
We study the effectiveness of n-detection test sets based on transition faults in detecting defects that affect the timing behavior of a circuit. We use path delay faults as surrogates for unmodeled defects, and show that the path delay fault coverage achieved by an n-detection transition fault test set increases significantly as n is increased. We also introduce a method to reduce the number of tests included in an n-detection test set by using different values of n for different faults based on their potential effect on the defect coverage. The resulting test sets are referred to as variable n-detection test sets
Keywords :
combinational circuits; crosstalk; fault location; integrated circuit testing; integrated logic circuits; logic testing; timing; n-detection test sets; path delay fault coverage; path delay faults; reordering procedure; static compaction; timing behavior; transition faults; unmodeled defects; variable n-detection test sets; Circuit faults; Circuit testing; Cities and towns; Delay; Electrical fault detection; Fault detection; Logic circuits; Robustness; Stress; Timing;
Conference_Titel :
VLSI Test Symposium, 1999. Proceedings. 17th IEEE
Conference_Location :
Dana Point, CA
Print_ISBN :
0-7695-0146-X
DOI :
10.1109/VTEST.1999.766662
