• DocumentCode
    2829357
  • Title

    Analysis and implementation of a multilevel coded modulation scheme based on level combination

  • Author

    Galbiati, Andrea ; Spalvieri, Arnaldo

  • Author_Institution
    Dipt. di Elettronica e Inf., Politecnico di Milano, Italy
  • fYear
    2004
  • fDate
    2004
  • Firstpage
    56
  • Lastpage
    59
  • Abstract
    The authors analyze and describe a coded modulation scheme based on binary component codes of intermediate length, and compare it with adversary schemes. The main novelty of the paper is a two level scheme based on combination of the second and third levels of the partition chain Z2/RZ2/2Z2/2RZ2, which outperforms the adversaries. More precisely, the proposed design is based on a first level convolutional code and on a second level block code with suboptimal soft-decision decoding. The component codes have been implemented on FPGA, and implementation details and measures are reported in the paper.
  • Keywords
    BCH codes; binary codes; block codes; convolutional codes; field programmable gate arrays; maximum likelihood decoding; modulation coding; FPGA; binary component codes; block code; convolutional code; field programmable gate arrays; multilevel coded modulation scheme; suboptimal soft-decision decoding; Block codes; Convolutional codes; Decision feedback equalizers; Delay systems; Field programmable gate arrays; Lattices; Linear code; Maximum likelihood decoding; Modulation coding; Parity check codes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Communications, 2004 International Zurich Seminar on
  • Print_ISBN
    0-7803-8329-X
  • Type

    conf

  • DOI
    10.1109/IZS.2004.1287387
  • Filename
    1287387