DocumentCode
2829776
Title
RACE on a physically distributed and logically shared memory system
Author
Kim, Seongwoon ; Ki, Ando ; Kim, Bogwan
Author_Institution
ETRI, South Korea
fYear
2005
fDate
16-18 Aug. 2005
Firstpage
40
Lastpage
45
Abstract
The RACE (remote access cache coherency enforcement) protocol is a cache coherency protocol that uses a full-mapped directory-based cache protocol to provide a consistent memory through multi-level memory hierarchy consisting of a number of processor caches, physically distributed shared-memory, and third level caches. In this paper, we have proposed a RACE protocol which can be used in the physically distributed and logically shared memory system.
Keywords
cache storage; distributed shared memory systems; memory protocols; RACE protocol; distributed shared memory system; full-mapped directory-based cache protocol; logically shared memory system; multilevel memory hierarchy; remote access cache coherency enforcement protocol; Access protocols; Computer architecture; Electronic mail; Hardware; Memory architecture; Microprocessors; Multiprocessing systems; Network interfaces; Packaging; Turning;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems Engineering, 2005. ICSEng 2005. 18th International Conference on
Print_ISBN
0-7695-2359-5
Type
conf
DOI
10.1109/ICSENG.2005.69
Filename
1562826
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