A numerically stable pipeline net VLSI architecture for the isomorphic Hopfield model

A reconfigurable pipeline net VLSI architecture for implementing Hopfield neural models is presented. It is known that the Hopfield models involve computing the hyperbolic trigonometric functions which are difficult to realize using digital VLSI architectures. A useful isomorphic nonlinear mapping to convert those hyperbolic trigonometric nonlinear functions into the simple second-order polynomial functions is introduced. The isomorphic formulation provides a stronger ability to decompose the problem into several independent tasks which can be assigned to a number of processors. The pipelining period and block pipelining period of the proposed architecture have the computational orders of O(1) and O(n), respectively, where n is number of neurons