Title :
An FPGA-based Spur-reduced numerically controlled oscillator
Author_Institution :
Dept. of Eng., Indiana Univ. Purdue Univ. Fort Wayne, Fort Wayne, IN, USA
fDate :
June 30 2012-July 2 2012
Abstract :
Direct digital synthesizers (DDS), or numerically controlled oscillators (NCO), are important components in many digital communication systems, such as digital radios and modems, software-defined radios, digital down/up converters for cellular and PCS base stations, etc. A common method for digitally generating a complex or real valued sinusoid employs a lookup table scheme. This paper presents a FPGA-based method which can significantly reduce the Spurious Free Dynamic Range (SFDR). The proposed design is implemented on Xilinx Virtex 5 FPGA and the simulation results are compared with previous results to demonstrate significant improvement in reducing SFDR.
Keywords :
direct digital synthesis; field programmable gate arrays; logic design; software radio; table lookup; FPGA-based spur-reduced numerically controlled oscillator; PCS base stations; Xilinx Virtex 5 FPGA; cellular base stations; digital communication systems; digital down/up converters; digital radios; direct digital synthesizers; lookup table scheme; modems; software-defined radios; spurious free dynamic range; Field programmable gate arrays; Frequency synthesizers; Noise; Quantization; Standards; Table lookup; Taylor series; Direct Digital Synthesizer; FPGA; SFDR;
Conference_Titel :
System Science and Engineering (ICSSE), 2012 International Conference on
Conference_Location :
Dalian, Liaoning
Print_ISBN :
978-1-4673-0944-8
Electronic_ISBN :
978-1-4673-0943-1
DOI :
10.1109/ICSSE.2012.6257174
