Gallium arsenide bit-serial cells for digital filters

Describes the design of some GaAs bit-serial arithmetic and control cells that form part of a cell library intended for use in the implementation of digital filters. Device processing and fabrication is being carried out by Honeywell Physical Sciences Center using an advanced self-aligned 1 μm gate enhancement/depletion MESFET process. The individual cells have been assembled into multi-project chips for initial fabrication and design verification. Once validated the cells will be used to design a simple FIR filter and a universal adaptor (see H.M. Reekie et al. 1984) for wave digital filters. The ultimate throughput in bit serial circuits can be very high using pipelined architectures. The objective of the present work is to realise the highest data rates possible by combining GaAs IC technology with pipelined bit-serial structures. To this end cells suitable as building blocks for such systems have been designed. The cells include a programmable serial to parallel converter, a parallel to serial converter, an adder, an ECL buffer, a 6-bit multiplier, a programmable word delay and a clock generator