DocumentCode
283446
Title
On the mapping of the discrete Fourier transform
Author
Tran, S.C. ; Creasey, D.J.
Author_Institution
Dept. of Electr. & Electr. Eng., Birmingham Univ., UK
fYear
1988
fDate
32331
Firstpage
42614
Lastpage
42617
Abstract
Parallel- and pipeline-processor structures can maximise the speed-up factor and minimise the input/output cost in a network of transputers. These structures can implement most digital signal-processing applications. However, the paper concentrates on the evaluation of the discrete Fourier transform (DFT). The number of arithmetic operations and interprocessor transfers are used to evaluate the algorithms. Speed is shown to depend upon the distribution and sizes of data points and upon the numbers of transputers available
Keywords
fast Fourier transforms; parallel processing; arithmetic operations; discrete Fourier transform; interprocessor transfers; parallel processing; transputers;
fLanguage
English
Publisher
iet
Conference_Titel
Recent Advances in Parallel Processing for Control, IEE Colloquium on
Conference_Location
Bangor
Type
conf
Filename
209432
Link To Document