Simulation of all-digital DPSK modems and synchronizers

Author

Jamadagni, H.S. ; Sonde, B.S. ; Shah, A.V.

Author_Institution

Indian Inst. of Sci., Bangalore, India

fYear

1989

fDate

22-24 Nov 1989

Firstpage

150

Lastpage

153

Abstract

A modular program that simulates the bit error rate (BER), effects of synchronizer performance on the demodulator, performance of the demodulator under impulsive noise and block error rate (BKER) of a differential phase-shift keyed (DPSK) model is described. The DPSK modulator, receive filter, DPSK demodulator and synchronizer, and error analyzer and statistics collector program modules are discussed. Simulation results for an all-digital DPSK modem and synchronizers are presented. It is shown that such a simulation simplifiers selection of appropriate schemes for realization of circuitry

Keywords

electronic engineering computing; modems; phase shift keying; synchronisation; telecommunications computing; DPSK demodulator; DPSK modulator; all-digital DPSK modems; bit error rate; block error rate; demodulator; differential phase-shift keyed; error analyzer; impulsive noise; modular program; receive filter; statistics collector program; synchronizer; synchronizer performance; synchronizers; Bit error rate; Circuit simulation; Demodulation; Differential quadrature phase shift keying; Error analysis; Filters; Modems; Modulation coding; Phase noise; Statistical analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON '89. Fourth IEEE Region 10 International Conference

Conference_Location

Bombay

Type

conf

DOI

10.1109/TENCON.1989.176916

Filename

176916