The design of orthogonal IIR filters for VLSI implementations

There are two possibilities for real time implementation of digital filters: either the algorithms can be realised on a general purpose signal processing device such as the TMS320/20, or special purpose chips can be designed. The latter case is considered; specifically the VLSI implementation of linear, passive, time invariant IIR filters as orthogonal structures. Such structures are known to possess excellent low roundoff noise properties, and have regularity, pipelinability and local communications which makes them attractive from a VLSI viewpoint. It is shown that the technique presented by Rao and Kailath (1984), a modified Schur algorithm, is extremely sensitive to numerical roundoff noise if spectral factorisation is used to obtain the required polynomial, and the method is only practical for special cases of transfer function for which the required polynomial can be obtained analytically. It is also shown, that any digital filter whose design philosophy is based upon the minimisation of some function in the filter passband is a practical candidate for orthogonal realisations