DocumentCode :
2838021
Title :
Power Optimized Dictionary Coding for Test Data Compression
Author :
Giri, Chandan ; Chattopadhyay, Santanu
Author_Institution :
Indian Inst. of Technol., Kharagpur
fYear :
2006
fDate :
15-17 Dec. 2006
Firstpage :
2541
Lastpage :
2545
Abstract :
To handle large volume of test data required for testing a System-on-a-Chip (SoC) demands test data compression techniques. Again power consumption during testing is becoming a major concern. Our paper presents a method of reducing power taking into consideration the dictionary based compression technique proposed in literature, where indices of the dictionary are used for compressing test data. Paper shows how power can be reduced by judicious allocation of dictionary indices to the coded words and the prefix bit selection to differentiate dictionary and non-dictionary entries. The power reduction achieved does affect neither the compression ratio nor the Test Application Time (TAT). It also does not increase the hardware overhead. Experimentation with ISCAS89 benchmark circuits shows up to 71% saving in power.
Keywords :
data compression; integrated circuit testing; system-on-chip; ISCAS89 benchmark circuits; SoC; power consumption; power optimized dictionary coding; prefix bit selection; system-on-a-chip; test application time; test data compression; Automatic testing; Benchmark testing; CMOS technology; Circuit testing; Dictionaries; Energy consumption; Hardware; System testing; System-on-a-chip; Test data compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Technology, 2006. ICIT 2006. IEEE International Conference on
Conference_Location :
Mumbai
Print_ISBN :
1-4244-0726-5
Electronic_ISBN :
1-4244-0726-5
Type :
conf
DOI :
10.1109/ICIT.2006.372618
Filename :
4237940
Link To Document :
بازگشت