DocumentCode
2838520
Title
Design of power efficient FPGA based hardware accelerators for financial applications
Author
Hegner, Jonas Stenbaek ; Sindholt, J. ; Nannarelli, Alberto
Author_Institution
Dept. Inf. & Math. Modelling, Tech. Univ. of Denmark, Lyngby, Denmark
fYear
2012
fDate
12-13 Nov. 2012
Firstpage
1
Lastpage
4
Abstract
Using Field Programmable Gate Arrays (FPGAs) to accelerate financial derivative calculations is becoming very common. In this work, we implement an FPGA-based specific processor for European option pricing using Monte Carlo simulations, and we compare its performance and power dissipation to the execution on a CPU. The experimental results show that impressive results, in terms of speed-up and energy savings, can be obtained by using FPGA-based accelerators at expenses of a longer development time.
Keywords
Monte Carlo methods; field programmable gate arrays; financial data processing; logic design; CPU; European option pricing; FPGA-based accelerator; FPGA-based specific processor; Monte Carlo simulation; field programmable gate array; financial application; financial derivative calculation; hardware accelerator; power dissipation; power efficient FPGA; Computational modeling; Data models; Europe; Field programmable gate arrays; Mathematical model; Monte Carlo methods; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
NORCHIP, 2012
Conference_Location
Cpenhagen
Print_ISBN
978-1-4673-2221-8
Electronic_ISBN
978-1-4673-2222-5
Type
conf
DOI
10.1109/NORCHP.2012.6403096
Filename
6403096
Link To Document