Title :
Test generation: A boundary scan implementation for module interconnect testing
Abstract :
The IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture provides access to internal module networks required for mtercomect testmg in cases where physical access is lirmted or not possible. Consequently, test generation tools must be adapted to support boundary scan test techniques. This paper describes an automated test pattern generation process that has been developed for producing interconnect test data for simple and complex 1149.1 implementations.
Keywords :
Automatic testing; Circuit faults; Circuit testing; Fixtures; IEEE standards; Integrated circuit interconnections; Logic testing; System testing; Test pattern generators;
Conference_Titel :
Test Conference, 1991, Proceedings., International
Conference_Location :
Nashville, TN, USA
Print_ISBN :
0-8186-9156-5
DOI :
10.1109/TEST.1991.519498