DocumentCode
2840189
Title
Sense amp design in SOI
Author
Golden, M. ; Tran, J. ; McGee, B. ; Kuo, B.
Author_Institution
Adv. Micro Devices, Sunnyvale, CA, USA
fYear
2005
fDate
3-6 Oct. 2005
Firstpage
118
Lastpage
120
Abstract
Microprocessors require cutting edge technology to deliver competitive performance. AMD manufactures microprocessors in a 90nm, triple-Vt, SOI process. In this process, static transistor mismatch, caused by process variation, and dynamic transistor mismatch, caused by SOI effects, combine to increase the input referred offset of sense amplifier circuits used in SRAMs. A silicon experiment comparing different sense amp topologies reveals that body-tied transistors provide significant improvement in input referred offset without performance degradation.
Keywords
SRAM chips; amplifiers; integrated circuit design; microprocessor chips; silicon-on-insulator; 90 nm; CMOS; SOI effects; SRAM; VLSI; body-tied transistors; dynamic transistor mismatch; input referred offset; process variation; sense amplifier circuits; static transistor mismatch; Circuit testing; Circuit topology; Frequency response; MOS devices; Manufacturing processes; Microprocessors; Random access memory; Silicon on insulator technology; Threshold voltage; Transistors; CMOS; SOI; SRAM; Sense amplifier; VLSI;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2005. Proceedings. 2005 IEEE International
ISSN
1078-621X
Print_ISBN
0-7803-9212-4
Type
conf
DOI
10.1109/SOI.2005.1563559
Filename
1563559
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