• DocumentCode
    2840335
  • Title

    Designing an iterative learning controller with reduced sampling rate and smooth controller output

  • Author

    Hellenbrand, S. ; Pandit, Madhukar

  • Author_Institution
    Control & Signal Processing Group, Kaiserslautern Univ., Germany
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    267
  • Lastpage
    272
  • Abstract
    A discrete-time iterative learning controller for single input single output systems is presented. It works with a reduced sampling rate in order to guarantee the reduction of the error norm from cycle to cycle. A consequence of the increased sample time is that large and abrupt, changes in the controller output are likely to be induced. In order to overcome this problem, the design of an ILC using hold devices with continuous transitions between the control values is presented
  • Keywords
    control system CAD; convergence; discrete time systems; learning systems; sampled data systems; discrete-time iterative learning controller; error norm reduction; hold devices; reduced sampling rate; single input single output systems; smooth controller output; Continuous time systems; Control systems; Convergence; Process control; Sampling methods; Signal design; Signal processing; Signal sampling; Trajectory; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Control System Design, 2000. CACSD 2000. IEEE International Symposium on
  • Conference_Location
    Anchorage, AK
  • Print_ISBN
    0-7803-6566-6
  • Type

    conf

  • DOI
    10.1109/CACSD.2000.900222
  • Filename
    900222