DocumentCode :
2841724
Title :
Full wafer level stacking without TSV applications to memory-only and heterogeneous SiP
Author :
Val, Christian ; Noiray, Pascal Couderc J ; Boulay, Nadia
Author_Institution :
3D PLUS, Buc, France
fYear :
2011
fDate :
19-21 Oct. 2011
Firstpage :
298
Lastpage :
303
Abstract :
A technological break based on Wafer Level Package started in 2002; consists in only stacking Known Good Rebuilt Wafer (what Freescale named: RCP and Infineon named e-Wlb) instead of standard wafers. This approach allows to have a very good yield, on the contrary of the W2W with TSV technologies. Several applications will be presented on the medical area, industrial area and smart card area.
Keywords :
system-in-package; wafer level packaging; Freescale; Infineon; RCP; e-Wlb; full wafer level stacking; heterogeneous SiP; industrial area; medical area; memory-only SiP; rebuilt wafer; smart card area; IEEE catalog; Mechanical sensors; Pacemakers; Stacking; Three dimensional displays; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2011 6th International
Conference_Location :
Taipei
ISSN :
2150-5934
Print_ISBN :
978-1-4577-1387-3
Electronic_ISBN :
2150-5934
Type :
conf
DOI :
10.1109/IMPACT.2011.6117181
Filename :
6117181
Link To Document :
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