A multiple modulator fractional divider

Author

Miller, Brian ; Conley, Bob

Author_Institution

Hewlett-Packard, Spokane, WA, USA

fYear

1990

fDate

23-25 May 1990

Firstpage

559

Lastpage

568

Abstract

Based on oversampling A/D conversion technology which allows the spectrum of error energy to be shaped so that fractional synthesis error energy is pushed away from the carrier, a CMOS integrated fractional-N divider is presented. A complete fractional-N phase locked loop (PLL) which was constructed utilizing only the CMOS divider, a dual modulus prescaler, a simple loop filter, and a voltage controlled oscillator is discussed. The resulting PLL is shown to exhibit no fractional spurs

Keywords

CMOS integrated circuits; frequency dividers; phase-locked loops; CMOS divider; PLL; VCO; dual modulus prescaler; loop filter; multiple modulator fractional divider; oversampling A/D conversion; phase locked loop; voltage controlled oscillator; Bandwidth; CMOS technology; Filters; Frequency conversion; Frequency synthesizers; Phase locked loops; Phase noise; Signal resolution; Signal synthesis; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Frequency Control, 1990., Proceedings of the 44th Annual Symposium on

Conference_Location

Baltimore, MD

Type

conf

DOI

10.1109/FREQ.1990.177545

Filename

177545

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2841946