DocumentCode :
2842487
Title :
Performance prediction of on-chip high-throughput global signaling
Author :
Hashimoto, Masanori ; Tsuchiya, Akira ; Shinmyo, Akinori ; Onodera, Hidetoshi
Author_Institution :
Dept. of ISE, Osaka Univ., Japan
fYear :
2005
fDate :
24-26 Oct. 2005
Firstpage :
79
Lastpage :
82
Abstract :
On-chip global signaling whose performance improves with technology advance is eagerly demanded. This work focuses on wave pipelining on on-chip transmission lines, which is one of probable solutions, and predicts the trend of signaling performance in the future. Experiments reveal that transmission capacity per channel will improve till at least 35nm technology in 10mm-long or below signaling. We also demonstrate that current-mode differential signaling is robust against power supply noise, but power delivery with nonzero impedance degrades the performance.
Keywords :
integrated circuit interconnections; integrated circuit noise; current-mode differential signaling; nonzero impedance; on-chip global signaling; on-chip transmission lines; power delivery; power supply noise; transmission capacity; wave pipelining; Degradation; Delay; Impedance; Noise robustness; Pipeline processing; Power supplies; Power transmission lines; Transistors; Wire; Working environment noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 2005. IEEE 14th Topical Meeting on
Print_ISBN :
0-7803-9220-5
Type :
conf
DOI :
10.1109/EPEP.2005.1563706
Filename :
1563706
Link To Document :
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