DocumentCode
28447
Title
Fast and Wide Range Voltage Conversion in Multisupply Voltage Designs
Author
Lanuzza, Marco ; Corsonello, Pasquale ; Perri, Stefania
Author_Institution
Dept. of Inf., Modeling, Electron. & Syst. Eng., Univ. of Calabria, Arcavacata di Rende, Italy
Volume
23
Issue
2
fYear
2015
fDate
Feb. 2015
Firstpage
388
Lastpage
391
Abstract
Multisupply voltage design technique is widely used in modern system-on-chips to tradeoff energy and speed. Level shifters (LSs) allow different voltage domains to be interfaced. In this brief, a new LS is presented for fast and wide range voltage conversion. Because of a novel architecture combined with the use of multithreshold CMOS technique, the proposed circuit guarantees robust voltage shifting from the deep subthreshold to the above-threshold domain while exhibiting fast response and low energy consumption. When implemented in a 90-nm technology node, considering process-voltage-temperature variations, the proposed design reliably converts 100-mV input signals into 1 V output signals. Post-layout simulation results demonstrate that the new LS shows a propagation delay of 16.6 ns, a static power dissipation of 8.7 nW and a total energy per transition of only 77 fJ for a 0.2 V 1-MHz input pulse.
Keywords
CMOS integrated circuits; integrated circuit layout; low-power electronics; phase shifters; system-on-chip; deep subthreshold; fast range voltage conversion; frequency 1 MHz; level shifters; low energy consumption; multisupply voltage designs; multithreshold CMOS technique; post layout simulation; power 8.7 nW; propagation delay; robust voltage shifting; size 90 nm; static power dissipation; system-on-chips; time 16.6 ns; voltage 0.2 V; voltage 1 V; voltage 100 mV; wide range voltage conversion; CMOS integrated circuits; Delays; MOSFET; Power supplies; Threshold voltage; Very large scale integration; Level shifter (LS); multisupply voltage design (MSVD); subthreshold operation; ultralow power; ultralow power.;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2014.2308400
Filename
6763087
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