DocumentCode
2844745
Title
Derivation of Automatic Test Set for Detection of Missing Gate Faults in Reversible Circuits
Author
Kole, Dipak K. ; Rahaman, Hafizur ; Das, Debesh K. ; Bhattacharya, Bhargab B.
Author_Institution
Inf. Technol. Dept., Bengal Eng. & Sci. Univ., Shibpur, India
fYear
2011
fDate
19-21 Dec. 2011
Firstpage
200
Lastpage
205
Abstract
This article presents a novel technique for the generation of test set in a reversible quantum circuit. The algorithms are developed to derive the automatic test set (ATS) for the detection of all partial missing-gate faults, all single missing gate faults and multiple missing gate faults in an (n x n) reversible circuit implemented with k-CNOT gates. Experimental results on some benchmark circuits are also reported.
Keywords
automatic testing; logic design; logic testing; quantum gates; automatic test set derivation; benchmark circuits; k-CNOT gates; multiple missing gate fault; partial missing-gate fault detection; reversible quantum circuit; single missing gate fault; test set generation; Arrays; Benchmark testing; Bipartite graph; Circuit faults; Integrated circuit modeling; Logic gates; Vectors; Missing-gate faults; quantum computing; reversible logic; testable design; universal test set;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic System Design (ISED), 2011 International Symposium on
Conference_Location
Kochi, Kerala
Print_ISBN
978-1-4577-1880-9
Type
conf
DOI
10.1109/ISED.2011.69
Filename
6117351
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