Challenges for Low-power Embedded SOC´s

Low power is one of the most important metrics in the embedded SOC´s design. Many techniques and technologies for low-power design are developed and applied in the practical design projects. One of the difficulties in low-power design is the definition of power consumption. The power consumption of the LSI varies according to the operating function and data values. Current low-power techniques are focusing to reduce the power consumption using the characteristics of LSI behaviors. Some low-power techniques only supply the hardware features of low power and require the software control using these low-power features. This means that the system level approach including hardware features and software control is very important in low-power design. The final goal of low-power LSI is not the smallest power consumption of LSI but the long battery life, the low-cost cooling equipment, the small body, etc. of the embedded systems. Many low-power techniques, which are used in the practical SOC´s like SH-mobile application processors for mobile phones will be discussed. And new challenges for low-power solution in system level will be also discussed.