Title :
Performance evaluation of the HERMES multibit systolic array architecture for low level processing tasks
Author :
Bourbakis, Nikolaos ; Barlos, Fotios
Author_Institution :
Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA
Abstract :
The performance of the various parts of the HERMES multiprocessor vision system is evaluated. HERMES is an autonomous, hierarchical, heterogenic vision processing system, consisting of N/sup 2//4/sup i/, 0>
Keywords :
computer vision; parallel architectures; performance evaluation; HERMES multibit systolic array architecture; low level processing tasks; multiprocessor vision system; performance evaluation; photoarrays; Computer architecture; Computer graphics; Computer vision; Image processing; Machine vision; Microprocessors; Pattern recognition; Systolic arrays; Tree graphs; Vehicles;
Conference_Titel :
Systolic Arrays, 1988., Proceedings of the International Conference on
Conference_Location :
San Diego, CA, USA
Print_ISBN :
0-8186-8860-2
DOI :
10.1109/ARRAYS.1988.18052
