DocumentCode :
2848654
Title :
Compact modeling of interconnect reliability
Author :
de Orio, R.L. ; Selberherr, S.
Author_Institution :
Inst. for Microelectron., Tech. Univ. Wien, Wien, Austria
fYear :
2011
fDate :
17-18 Nov. 2011
Firstpage :
1
Lastpage :
2
Abstract :
Electromigration (EM) is one of the major reliability issues for modern integrated circuits. EM normally triggers a chip failure due to formation and growth of voids in a metal line of the interconnect structure. In order to investigate the failure mechanisms, EM experiments are performed under accelerated conditions, where an interconnect line is stressed with a higher current density and at a higher temperature than those under typical use conditions. Then, for the estimation of the interconnect lifetime under a real operating condition the times to failure (TTF) obtained from the accelerated tests have to be extrapolated to the use current density and temperature. A correct description and an adequate extrapolation procedure are, therefore, a must for a correct reliability assessment regarding EM failures.
Keywords :
current density; electromigration; failure analysis; integrated circuit interconnections; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; life testing; EM failures; accelerated tests; chip failure mechanisms; current density; electromigration; integrated circuits; interconnect line; interconnect reliability compact modeling; interconnect structure; metal line; times to failure; Copper; Electromigration; Integrated circuit interconnections; Integrated circuit modeling; Mathematical model; Reliability; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of
Conference_Location :
Tianjin
ISSN :
Pending
Print_ISBN :
978-1-4577-1998-1
Electronic_ISBN :
Pending
Type :
conf
DOI :
10.1109/EDSSC.2011.6117564
Filename :
6117564
Link To Document :
بازگشت