Reliability of ALD Hf-based High K Gate Stacks with Optimized Interfacial Layer and Pocket Implant Engineering

Author

Mao, A.Y. ; Lin, W.M. ; Yang, C.W. ; Hsieh, Y.S. ; Cheng, L.W. ; Lee, G.D. ; Tsai, C.T. ; Chung, S.S. ; Ma, G.H.

Author_Institution

United Microelectron. Corp., Hsinchu

fYear

2007

fDate

23-25 April 2007

Firstpage

1

Lastpage

2

Abstract

Reliability of ALD (atomic layer deposition) HfSiON high K gate stacks is greatly enhanced with a properly engineered IL (interfacial layer) between the gate dielectrics and the Si substrate. We report that the HfSiON, while deposited on an optimized plasma-based IL containing [N], exhibits strong resistance to the bombardment from heavy pocket implant species, achieving significantly reduced leakage and excellent reliability characteristics, compared to the HfSiON without an optimized IL and to the silicon oxynitride control wafers.

Keywords

MIS devices; atomic layer deposition; dielectric materials; hafnium compounds; high-k dielectric thin films; leakage currents; semiconductor device manufacture; semiconductor device reliability; silicon compounds; HfSiON; HfSiON deposition; MOS device; atomic layer deposition; high K gate dielectric stack reliability; leakage current reduction; optimized plasma-based interfacial layer; pocket implant engineering; Degradation; Dielectric substrates; High K dielectric materials; High-K gate dielectrics; Implants; Plasma devices; Plasma properties; Plasma temperature; Reliability engineering; Stress control;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems and Applications, 2007. VLSI-TSA 2007. International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

1-4244-0584-X

Electronic_ISBN

1524-766X

Type

conf

DOI

10.1109/VTSA.2007.378915

Filename

4239483