• DocumentCode
    2851256
  • Title

    Improving Software Based Self - Testing for Cache Memories

  • Author

    Sosnowski, Janusz

  • Author_Institution
    Warsaw Univ. of Technol., Warsaw
  • fYear
    2007
  • fDate
    16-18 Dec. 2007
  • Firstpage
    49
  • Lastpage
    54
  • Abstract
    Testing cache memories within the computer system environment is based on using processor instructions, which involve cache operations intermixed with RAM memory accesses. Applying test patterns to the cache and checking its behavior needs sophisticated instruction sequences. We simplify these sequences by means of the available on-chip performance monitors as well as built-in on-line error detectors. This new method is compared with classical approaches.
  • Keywords
    cache storage; program testing; random-access storage; RAM memory access; cache memory; processor instruction; software based self-testing; Automatic testing; Cache memory; Computer aided instruction; Computer displays; Computer errors; Detectors; Random access memory; Read-write memory; Software testing; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Test Workshop, 2007. IDT 2007. 2nd International
  • Conference_Location
    Cairo
  • Print_ISBN
    978-1-4244-1824-4
  • Electronic_ISBN
    978-1-4244-1825-1
  • Type

    conf

  • DOI
    10.1109/IDT.2007.4437427
  • Filename
    4437427
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2851256