DocumentCode
2851283
Title
A Topology-based Design Methodology for Networks-on-Chip Applications
Author
Elmiligi, Haytham ; Morgan, Ahmed A. ; El-Kharashi, M. Watheq ; Gebali, Fayez
Author_Institution
Univ. of Victoria, Victoria
fYear
2007
fDate
16-18 Dec. 2007
Firstpage
61
Lastpage
65
Abstract
The topological structure of interconnection networks plays an important role in the design of Networks-on-Chip based Systems. With an enormous number of regular and irregular topologies, acquiring the optimum network topology for a specific application is one of the most complex design problems. In this paper, we propose a new design methodology to automatically acquire the most adapted topology for a given application. A Matlab-based tool called OptNoC is developed to generate the interconnection network using the proposed methodology. The granularity of the OptNoC library facilitates a tool to explore ten different topologies for each design. The current version of the tool mainly aims at minimizing the interconnection network power consumption by using an exhaustive search mapping technique. As a proof of concept, a case study is discussed to show how OptNoC can improve the interconnection network power consumption compared to other tools.
Keywords
network topology; network-on-chip; search problems; Matlab-based tool; OptNoC; exhaustive search mapping technique; interconnection networks; networks-on-chip applications; optimum network topology; topology-based design methodology; Application software; Computer architecture; Computer graphics; Delay; Design methodology; Energy consumption; Libraries; Multiprocessor interconnection networks; Network topology; Network-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Test Workshop, 2007. IDT 2007. 2nd International
Conference_Location
Cairo
Print_ISBN
978-1-4244-1824-4
Electronic_ISBN
978-1-4244-1825-1
Type
conf
DOI
10.1109/IDT.2007.4437429
Filename
4437429
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