• DocumentCode
    2851640
  • Title

    Design and implementation of MIMO-STBC systems on FPGA hardware

  • Author

    Nguyen Trung Hieu ; Nguyen Thanh Tu ; Le Tran Danh ; Au Ngoc Duc ; Bui Huu Phu

  • Author_Institution
    DCSELAB, Hochiminh City Univ. of Technol., Ho Chi Minh City, Vietnam
  • fYear
    2012
  • fDate
    10-12 Oct. 2012
  • Firstpage
    274
  • Lastpage
    277
  • Abstract
    One potential technology to provide high speed data rate and reliable transmission for modern networks is multiple-input multiple-output (MIMO) systems, which are equipped multiple antennas at both the transmitters and receivers. The main purpose of this paper is to present our own design and implementation of MIMO Space-time block coding (STBC) systems with various number of transmit and receive antennas. They are implemented on FPGA Altera Stratix DSP Development KIT using Verilog HDL. BER performance of the systems with the different number of transmit and receive antennas is measured and compared in term of hardware and software simulation.
  • Keywords
    MIMO communication; field programmable gate arrays; receiving antennas; space-time block codes; transmitting antennas; BER performance; FPGA Altera Stratix DSP Development KIT; FPGA hardware; MIMO systems; MIMO-STBC systems; Verilog HDL; modern networks; multiple-input multiple-output systems; receive antennas; receivers; space-time block coding systems; transmit antennas; transmitters; Field programmable gate arrays; Hardware; MIMO; Receiving antennas; Transmitters; Wireless communication; FPGA; MIMO; STBC; hardware design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Technologies for Communications (ATC), 2012 International Conference on
  • Conference_Location
    Hanoi
  • ISSN
    2162-1020
  • Print_ISBN
    978-1-4673-4351-0
  • Type

    conf

  • DOI
    10.1109/ATC.2012.6404275
  • Filename
    6404275