DocumentCode
2852256
Title
Scheduling Task Graphs on Heterogeneous Multiprocessors with Reconfigurable Hardware
Author
Teller, Justin ; Ozguner, Fusun ; Ewing, Robert
Author_Institution
Dept. of Electr. & Comput. Engr., Ohio State Univ. Columbus, Columbus, OH
fYear
2008
fDate
8-12 Sept. 2008
Firstpage
17
Lastpage
24
Abstract
We address the problem of scheduling applications represented as directed acyclic task graphs (DAGs) onto architectures with reconfigurable processing cores. We introduce the Mutually Exclusive Processor Groups reconfiguration model, a novel reconfiguration model that captures many different modes of reconfiguration. Additionally, we propose the Heterogeneous Earliest Finish Time with Mutually Exclusive Processor Groups (HEFT-MEG) scheduling heuristic using the Mutually Exclusive Processor Groups reconfiguration model. HEFT-MEG schedules reconfigurations using a novel back-tracking algorithm to evaluate how different reconfiguration decisions affect previously scheduled tasks. HEFT-MEG´s goal when choosing configurations is to choose the most efficient configuration for different application phases. In simulation, HEFT-MEG generates higher quality schedules than those generated by the hardware-software co-scheduler proposed by Mei, et al. [21] and HEFT [31] using a single configuration.
Keywords
backtracking; directed graphs; microprocessor chips; scheduling; task analysis; back-tracking algorithm; directed acyclic task graphs; hardware-software co-scheduler; heterogeneous earliest finish time; heterogeneous multiprocessors; higher quality schedules; mutually exclusive processor groups reconfiguration model; reconfigurable hardware; reconfigurable processing cores; scheduling task graphs; Computer architecture; Concurrent computing; Field programmable gate arrays; Hardware; Microprocessors; Optimal scheduling; Principal component analysis; Processor scheduling; Runtime; Scheduling algorithm; Heterogeneous Multiprocessor; Reconfigurable Computing; scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Processing - Workshops, 2008. ICPP-W '08. International Conference on
Conference_Location
Portland, OR
ISSN
1530-2016
Print_ISBN
978-0-7695-3375-9
Electronic_ISBN
1530-2016
Type
conf
DOI
10.1109/ICPP-W.2008.39
Filename
4626775
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