Aliasing in a linear FSM used as a multiple-input signature analyzer under uniform and nonuniform error models

Author

Bhatia, Sandeep ; Albicki, Alexander ; Jha, Niraj K.

Author_Institution

Dept. of Electr. Eng., Princeton Univ., NJ, USA

Volume

1

fYear

1992

fDate

10-13 May 1992

Firstpage

427

Abstract

A simple model for computing the aliasing probability for any linear finite state machine (LFSM) used as a multiple-input signature analyzer (MISA) is presented. It is shown that the whole class of cyclic LFSMs has transient and steady-state aliasing probabilities under the uniform error model that are identical to those of any LFSR when it is used as an MISA. Some other functional circuits, such as accumulators, can also be used for data compression with similar performance to that of any LFSR. The steady-state aliasing probability is also derived for an LFSM used as an MISA under arbitrary error models

Keywords

data compression; finite state machines; logic analysers; logic testing; probability; MISA; aliasing probability; cyclic LFSMs; data compression; linear finite state machine; multiple-input signature analyzer; nonuniform error models; steady-state aliasing; transient aliasing; uniform error models; Automata; Circuit testing; Data compression; Erbium; Feedback circuits; Inverters; Linear feedback shift registers; Polynomials; Sequential circuits; Steady-state;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0593-0

Type

conf

DOI

10.1109/ISCAS.1992.229922

Filename

229922