Woodchuck: a low-level synthesizer for dynamic pipelined DSP arithmetic logic blocks

A synthesizer for building complex logic blocks for either pipelined or Domino/NORA dynamic logic is discussed. The block is built by programming a ROM, built from a binary tree of n-channel transistors, followed by a simple minimization procedure using only two graph minimization rules. This is in contrast to the usual techniques, which map minimized Boolean functions directly to transistor configurations. Merged trees have been successfully fabricated, up to six high, and these complex blocks are shown to have advantages in pipelined arrays for high-performance (DSP) arithmetic The synthesizer produces the trees directly from arithmetic specifications; the trees can be scaled, within the synthesizer, using closed-form approximate discharge formulas